Description:Operating voltage: 2.5 V to 5.5 V Supply current: 6 mA Pinout: PIN Description VIN This is the main power supply connection, and it should be powered at 2.5 V to 5.5 V. The SCL/SPC and SDA/SDI level shifters pull the I2;C and SPI bus high bits up to this level. GND The ground (0 V) connection for your power supply. Your I2;C or SPI control source must also share a common ground with this board. SCL/SPC Level-shifted I2;C/SPI clock line: HIGH is VIN, LOW is 0 V SDA/SDI Level-shifted I2;C data line and SPI data-in line (also doubles as SDO in 3-wire mode): HIGH is VIN, LOW is 0 V SDO SPI data-out line in 4-wire mode: HIGH is VDD, LOW is 0 V. Also used as a 3.3V-logic-level input to determine I2;C slave address (see below). This pin is not level-shifted and is not 5V-tolerant. CS SPI enable (chip select). Pulled up to VDD to enable I2;C communication by default; drive low to begin SPI communication. DRDY/INT2 Data ready indicator, a 3.3V-logic-level output. HIGH (3.3 V) indicates angular rate data can be read. Can also be configured as a FIFO interrupt. This output is not level-shifted. INT1 Programmable interrupt, a 3.3V-logic-level output. This output is not level-shifted.